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sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 1 features ? high speed: 12, 15, 20, 25, 35, 45, 55 and 70 ns ? battery backup: 2v data retention ? low power standby ? high-performance, low-power cmos process ? single +5v ( +10%) power supply ? easy memory expansion with ce1\, ce2, and oe\ options. ? all inputs and outputs are ttl compatible options marking ? timing 12ns access -12 (contact factory) 15ns access -15 20ns access -20 25ns access -25 35ns access -35 45ns access -45 55ns access -55* 70ns access -70* ? package(s) ? ceramic dip (400 mil) c no. 111 ceramic dip (600 mil) cw no. 112 ceramic lcc ec no. 207 ceramic lcc eca no. 208 ceramic flatpack f no. 303 ceramic soj dcj no. 501 ceramic soj soj no. 507 ? 2v data retention/low power l *electrical characteristics identical to those provided for the 45ns access devices. pin assignment (top view) available as military specifications ?smd 5962-89598 ?mil-std-883 nc 1 32 v cc a16 2 31 a15 a14 3 30 ce2 a12 4 29 we\ a7 5 28 a13 a6 6 27 a8 a5 7 26 a9 a4 8 25 a11 a3 9 24 oe\ a2 10 23 a10 a1 11 22 ce\ a0 12 21 dq8 dq1 13 20 dq7 dq2 14 19 dq6 dq3 15 18 dq5 v ss 16 17 dq4 nc 1 32 v cc a16 2 31 a15 a14 3 30 ce2 a12 4 29 we\ a7 5 28 a13 a6 6 27 a8 a5 7 26 a9 a4 8 25 a11 a3 9 24 oe\ a2 10 23 a10 a1 11 22 ce\ a0 12 21 dq8 dq1 13 20 dq7 dq2 14 19 dq6 dq3 15 18 dq5 v ss 16 17 dq4 nc 1 32 v cc a16 2 31 a15 a14 3 30 ce2 a12 4 29 we\ a7 5 28 a13 a6 6 27 a8 a5 7 26 a9 a4 8 25 a11 a3 9 24 oe\ a2 10 23 a10 a1 11 22 ce\ a0 12 21 dq8 dq1 13 20 dq7 dq2 14 19 dq6 dq3 15 18 dq5 v ss 16 17 dq4 32-pin dip (c, cw) 32-pin csoj (soj) 32-pin lcc (ec) 32-pin soj (dcj) 32-pin flat pack (f) 32-pin lcc (eca) general description the mt5c1008 sram employs high-speed, low power cmos designs using a four-transistor memory cell, and are fabricated using double-layer metal, double-layer polysilicon technology. for design flexibility in high-speed memory applications, this device offers dual chip enables (ce1\, ce2) and output enable (oe\). these control pins can place the outputs in high-z for additional flexibility in system design. all devices operate from a single +5v power supply and all inputs and outputs are fully ttl compatible. writing to these devices is accomplished when write enable (we\) and ce1\ inputs are both low and ce2 is high. reading is accomplished when we\ and ce2 remain high and ce1\ and oe\ go low. the devices offer a reduced power standby mode when disabled, allowing system designs to achieve low standby power requirements. the ?l? version offers a 2v data retention mode, re- ducing current consumption to 1ma maximum. 128k x 8 sram with dual chip enable for more products and information please visit our web site at www.austinsemiconductor.com 4 3 2 1 32 31 30 a12 a14 a10 nc v cc a15 ce2 14 15 16 17 18 19 20 dq2 dq3 v ss dq4 dq5 dq6 dq7 5 6 7 8 9 10 11 12 13 a7 a6 a5 a4 a3 a2 a1 a0 dq1 29 28 27 26 25 24 23 22 21 we a13 a8 a9 a11 oe a10 ce1 dq8 \ \ \ 6
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 2 functional block diagram row decoder 1,048,576-bit memory array i/o control v cc gnd d q 8 dq1 ce1\ ce2 oe\ we\ a a a a a a a a a column decoder a a a a a a a a power down (lsb) (lsb) note: the two least significant row address bits (a8 and a6) are encoded using gray code. mode oe\ ce1\ ce2 we\ dq power standby x h x x high-z standby standby x x l x high-z standby read l l h h q active read h l h h high-z active write x l h l d active truth table
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 3 absolute maximum ratings* supply voltage range (vcc)...............................-.5v to +6.0v storage temperature ....................................-65 c to +150 c short circuit output current (per i/o)?.......................20ma voltage on any pin relative to vss................-.5v to vcc+1 v max junction temperature**.......................................+150 c power dissipation .....................................................................1 w *stresses at or greater than those listed under "absolute maxi- mum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods will affect reliability. refer to page 17 of this datasheet for a technical note on this subject. ** junction temperature depends upon package type, cycle time, loading, ambient temperature and airflow, and humidity. electrical characteristics and recommended dc operating conditions (-55 o c < t c < 125 o c & -45 o c to +85 o c; v cc = 5.0v +10%) description conditions sym max units notes input capacitance (a0-a16) c i 12 pf 4 output capacitance c o 14 pf 4 input capacitance (ce\, we\, oe\) c i 20 pf 4 t a = 25 o c, f = 1mhz v cc = 5v capacitance sym -12 -15 -20 -25 -35 -45 units notes i ccsp 250 180 150 140 135 125 ma 3 i cclp * 250 180 140 130 125 115 ma power supply current: standby i sbt 25 25 25 25 25 25 ma i sbc 10 10 10 10 10 10 ma parameter power supply current: operating ce\ < v il ; oe\, we\, and ce2> v ih v cc = max, f = max = 1/t rc (min) output open *l version only ce\ > v cc -0.2v; v cc = max v il < v ss -0.2v v ih > v cc -0.2v; f = 0 hz ce\=v ih, ce2=v il ; other inputs at < v il , > v ih , v cc = max f = 0 hz max conditions description conditions sym min max units notes input high (logic 1) voltage v ih 2.2 v cc +0.5 v1 input low (logic 0) voltage v il -0.5 0.8 v 1, 2 input leakage current 0v< v in < v cc il i -10 10 a output leakage current output(s) disabled 0v< v out < v cc il o -10 10 a output high voltage i oh =-4.0ma v oh 2.4 v 1 output low voltage i ol =8.0ma v ol 0.4 v 1
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 4 electrical characteristics and recommended ac operating conditions (note 5) (-55 o c < t c < 125 o c & -40 o c to +85 o c; v cc = 5.0v +10%) min max min max min max min max min max min max units notes read cycle read cycle time t rc 12 15 20 25 35 45 ns address access time t aa 12 15 20 25 35 45 ns chip enable access time t ace 12 15 20 25 35 45 ns output hold from address change t oh 333333 ns chip enable to output in low-z t lzce 333333 ns4, 6, 7 chip disable to output in high-z t hzce 7 7 8 10 15 20 ns 4, 6, 7 output enable access time t aoe 7 7 7 10 15 20 ns 4, 6, 7 output enable to output in low-z t lzoe 000000 ns output disable to output in high-z t hzoe 7 7 8 10 15 20 ns 4, 6, 7 write cycle write cycle time t wc 12 15 20 25 35 45 ns chip enable to end of write t cw 11 12 15 20 25 35 ns address valid to end of write t aw 11 12 15 20 25 35 ns address setup time t as 000000 ns address hold from end of write t ah 000005 ns write pulse width t wp 11 12 15 20 25 35 ns data setup time t ds 8 8 10 15 20 20 ns data hold time t dh 000000 ns write disable to output in low-z t lzwe 555555 ns4, 6, 7 write enable to output in high-z t hzwe 7 7 9 10 15 20 ns 4, 6, 7 description -20 symbol -25 -35 -45 -15 -12
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 5 ac test conditions input pulse levels ................................... vss to 3.0v input rise and fall times ....................................... 5ns input timing reference levels ............................. 1.5v output reference levels ..................................... 1.5v output load .............................. see figures 1 and 2 notes 1. all voltages referenced to v ss (gnd). 2. -2v for pulse width < 20ns 3. i cc is dependent on output loading and cycle rates. the specified value applies with the outputs unloaded, and f = 1 hz. t rc (min) 4. this parameter is guaranteed but not tested. 5. test conditions as specified with the output loading as shown in fig. 1 unless otherwise noted. 6. t lzce, t lzwe, t lzoe, t hzce, t hzoe and t hzwe are specified with cl = 5pf as in fig. 2. transition is measured 200mv typical from steady state voltage, allowing for actual tester rc time constant. 7. at any given temperature and voltage condition, t hzce is less than t lzce, and t hzwe is less than t lzwe and t hzoe is less than t lzoe. 8. we\ is high for read cycle. 9. device is continuously selected. chip enables and output enables are held in their active state. 10. address valid prior to, or coincident with, latest occurring chip enable. 11. t rc = read cycle time. 12. ce2 timing is the same as ce1\ timing. the waveform is inverted. 13. chip enable (ce1\, ce2) and write enable (we\) can initiate and terminate a write cycle. fig. 1 output load equivalent fig. 2 output load equivalent data retention electrical characteristics (l version only) +5v q 255 30 480 5 pf +5v q 255 480 123 1 2 3 1 2 3 123 1234 1 23 4 1 23 4 1234 don?t care undefined low vcc data retention waveform 123456789 123456789 123456789 123456789 123 1 2 3 1 2 3 123 1234 1 23 4 1 23 4 1234 12345678 12345678 12345678 12345678 123 1 2 3 1 2 3 123 1234 1 23 4 1 23 4 1234 123456789 123456789 123456789 123456789 123 1 2 3 1 2 3 123 1234 1 23 4 1 23 4 1234 12345678 12345678 12345678 12345678 123 1 2 3 1 2 3 123 1234 1 23 4 1 23 4 1234 data retention mode v dr > 2v 4.5v 4.5v v dr t cdr t r (v cc - 0.2v) v in > (v cc - 0.2v) or < 0.2v, f=0 v cc = 2v i ccdr 1.0 ma chip deselect to data retention time t cdr 0 --- ns 4 operation recovery time t r t rc ns 4, 11 conditions
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 6 taa toh trc trc previous data valid valid data valid address dq tpd tpu thzce tace tlzce thzoe tlzoe taoe trc trc data valid ce\ oe\ dq icc read cycle no. 1 8, 9 read cycle no. 2 7, 8, 10, 12
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 7 write cycle no. 1 12, 13 (chip enabled controlled) write cycle no. 2 7, 12, 13 (write enabled controlled) tdh tds twp1 twp1 tah tcw taw tcw tas twc twc high z data vaild address ce\ we\ d q tdh twp1 twp1 tas taw tcw tah tcw twc twc data valid address ce\ we\ d q high-z note: output enable (oe\) is inactive (high).
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 8 mechanical definitions* asi case #111 (package designator c) smd 5962-89598, case outline z *all measurements are in inches. d s1 pin 1 se b b1 a s2 q l l1 min max a --- 0.232 b 0.014 0.023 b1 0.038 0.065 c 0.008 0.015 d --- 1.700 e 0.350 0.405 e1 0.390 0.420 e l 0.125 0.200 l1 0.150 --- q 0.015 0.060 s --- 0.100 s1 0.005 --- s2 0.005 --- note: symbol 0.100 bsc smd specifications either configuration in detail a is allowed on smd. c note e 0 o to 15 o e1
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 9 asi case #112 (package designator cw) smd 5962-89598, case outline x mechanical definitions* min max a 0.089 0.111 b 0.016 0.020 b1 0.045 0.055 b2 0.009 0.011 d 1.585 1.615 e 0.585 0.605 e1 0.595 0.610 e 0.090 0.110 l 0.040 0.060 l1 0.125 0.175 symbol smd specifications e b b1 l l1 a d pin 1 e e1 b2 *all measurements are in inches.
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 10 mechanical definitions* asi case #207 (package designator ec) smd 5962-89598, case outline u *all measurements are in inches. b1 l2 detail a a b2 min max a 0.080 0.100 b 0.022 0.028 b1 0.006 0.022 b2 0.040 --- d 0.800 0.840 e 0.392 0.408 e h l 0.070 0.080 l1 0.090 0.110 l2 0.003 0.015 symbol 0.012 ref smd specifications 0.050 bsc d e see detail a l1 l e b h x 45 o
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 11 asi case #208 (package designator eca) smd 5962-89598, case outline m mechanical definitions* *all measurements are in inches. e d b1 detail a a b2 e1 l1 b d1 l see detail a e min max a 0.060 0.120 b 0.022 0.028 b1 0.004 0.014 b2 0.040 --- d 0.442 0.458 d1 e 0.540 0.560 e1 e l 0.045 0.055 l1 0.075 0.095 0.050 bsc symbol smd specifications 0.300 bsc 0.400 bsc
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 12 mechanical definitions* asi case #303 (package designator f) smd 5962-89598, case outline t *all measurements are in inches. c e2 a q e3 min max a 0.097 0.125 b 0.015 0.019 c 0.003 0.009 d --- 0.830 e 0.400 0.420 e1 --- 0.450 e2 0.180 --- e3 0.030 --- e l 0.250 0.370 q 0.026 0.045 s --- 0.045 s1 0.000 --- symbol smd specifications 0.050 bsc pin 1 index 32 17 16 1 bottom view d e l e b top view e1 s1 s
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 13 *all measurements are in inches. asi case #501 (package designator dcj) smd 5962-89598, case outline 7 mechanical definitions* min max a 0.132 0.144 a2 0.026 0.036 b1 0.030 0.040 b 0.015 0.019 d 0.812 0.828 d1 0.740 0.760 e 0.405 0.415 e1 0.435 0.445 e2 0.360 0.380 e symbol smd specifications 0.050 bsc a a2 e b d e d1 e1 e2 b1
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 14 *all measurements are in inches. asi case #507 (package designator soj) smd 5962-89598, case outline y mechanical definitions* 1234567890123456789012345 1 23456789012345678901234 5 1 23456789012345678901234 5 1 23456789012345678901234 5 1 23456789012345678901234 5 1234567890123456789012345 e2 b b2 b1 123 1 2 3 123 123 1 2 3 123 e 1 a2 e 2 s1 b3 base plane seating plane d e d1 j 32 1 17 16 e1 detail a min max a 0.120 0.165 a1 0.088 0.120 a2 b b1 b2 b3 0.025 0.045 b 0.015 0.019 d 0.816 0.838 d1 e 0.419 0.431 e1 0.430 0.445 e2 0.360 0.380 e e1 e2 0.005 --- j s 0.030 0.040 s1 0.750 ref 0.050 bsc 0.038 typ 0.020 typ 0.005 typ symbol smd specifications 0.020 ref 0.070 ref 0.010 ref 0.030r typ s e a a1 see detail a b
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 15 *available processes it = industrial temperature range -40 o c to +85 o c xt = extended temperature range -55 o c to +125 o c 883c = full military processing -55 o c to +125 o c ** options l = 2v data retention/low power ordering information example: mt5c1008cw-45/883c example: mt5c1008eca-25l/xt device number package t yp e speed ns options** process device number package t yp e speed ns options** process mt5c1008 mt5c1008 c cw -12 -12 l l /* /* mt5c1008 mt5c1008 ec eca -12 -12 l l /* /* mt5c1008 mt5c1008 c cw -15 -15 l l /* /* mt5c1008 mt5c1008 ec eca -15 -15 l l /* /* mt5c1008 mt5c1008 c cw -20 -20 l l /* /* mt5c1008 mt5c1008 ec eca -20 -20 l l /* /* mt5c1008 mt5c1008 c cw -25 -25 l l /* /* mt5c1008 mt5c1008 ec eca -25 -25 l l /* /* mt5c1008 mt5c1008 c cw -35 -35 l l /* /* mt5c1008 mt5c1008 ec eca -35 -35 l l /* /* mt5c1008 mt5c1008 c cw -45 -45 l l /* /* mt5c1008 mt5c1008 ec eca -45 -45 l l /* /* mt5c1008 mt5c1008 c cw -55 -55 l l /* /* mt5c1008 mt5c1008 ec eca -55 -55 l l /* /* mt5c1008 mt5c1008 c cw -70 -70 l l /* /* mt5c1008 mt5c1008 ec eca -70 -70 l l /* /* example: mt5c1008f-25l/883c example: mt5c1008dcj-35/it device number package t yp e speed ns options** process device number package t yp e speed ns options** process mt5c1008 f -12 l /* mt5c1008 mt5c1008 dcj soj -12 -12 l l /* /* mt5c1008 f -15 l /* mt5c1008 mt5c1008 dcj soj -15 -15 l l /* /* mt5c1008 f -20 l /* mt5c1008 mt5c1008 dcj soj -20 -20 l l /* /* mt5c1008 f -25 l /* mt5c1008 mt5c1008 dcj soj -25 -25 l l /* /* mt5c1008 f -35 l /* mt5c1008 mt5c1008 dcj soj -35 -35 l l /* /* mt5c1008 f -45 l /* mt5c1008 mt5c1008 dcj soj -45 -45 l l /* /* mt5c1008 f -55 l /* mt5c1008 mt5c1008 dcj soj -55 -55 l l /* /* mt5c1008 f -70 l /* mt5c1008 mt5c1008 dcj soj -70 -70 l l /* /*
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 16 asi to dscc part number cross reference asi package designator ec & eca asi part # smd part # mt5c1008ec-20/883c 5962-8959838mua mt5c1008ec-20l/883c 5962-8959821mua mt5c1008ec-25/883c 5962-8959837mua mt5c1008ec-25l/883c 5962-8959820mua mt5c1008ec-35/883c 5962-8959836mua mt5c1008ec-35l/883c 5962-8959819mua mt5c1008ec-45/883c 5962-8959835mua mt5c1008ec-45l/883c 5962-8959818mua mt5c1008ec-55/883c 5962-8959834mua mt5c1008ec-55l/883c 5962-8959817mua mt5c1008ec-70/883c 5962-8959833mua mt5c1008ec-70l/883c 5962-8959816mua mt5c1008eca-20/883c 5962-8959838mma mt5c1008eca-20l/883c 5962-8959821mma mt5c1008eca-25/883c 5962-8959837mma mt5c1008eca-25l/883c 5962-8959820mma mt5c1008eca-35/883c 5962-8959836mma mt5c1008eca-35l/883c 5962-8959819mma mt5c1008eca-45/883c 5962-8959835mma mt5c1008eca-45l/883c 5962-8959818mma mt5c1008eca-55/883c 5962-8959834mma mt5c1008eca-55l/883c 5962-8959817mma mt5c1008eca-70/883c 5962-8959833mma mt5c1008eca-70l/883c 5962-8959816mma asi package designator c & cw asi part # smd part # mt5c1008c-20/883c 5962-8959838mza mt5c1008c-20l/883c 5962-8959821mza mt5c1008c-25/883c 5962-8959837mza mt5c1008c-25l/883c 5962-8959820mza mt5c1008c-35/883c 5962-8959836mza mt5c1008c-35l/883c 5962-8959819mza mt5c1008c-45/883c 5962-8959835mza mt5c1008c-45l/883c 5962-8959818mza mt5c1008c-55/883c 5962-8959834mza mt5c1008c-55l/883c 5962-8959817mza mt5c1008c-70/883c 5962-8959833mza mt5c1008c-70l/883c 5962-8959816mza mt5c1008cw-20/883c 5962-8959838mxa mt5c1008cw-20 l/8 83c 5962-8959821mxa mt5c1008cw-25/883c 5962-8959837mxa mt5c1008cw-25 l/8 83c 5962-8959820mxa mt5c1008cw-35/883c 5962-8959836mxa mt5c1008cw-35 l/8 83c 5962-8959819mxa mt5c1008cw-45/883c 5962-8959835mxa mt5c1008cw-45 l/8 83c 5962-8959818mxa mt5c1008cw-55/883c 5962-8959834mxa mt5c1008cw-55 l/8 83c 5962-8959817mxa mt5c1008cw-70/883c 5962-8959833mxa mt5c1008cw-70 l/8 83c 5962-8959816mxa asi package designator dcj & soj asi part # smd part # mt5c1008dcj-20/883c 5962-8959838m7a mt5c1008dcj-20l/883c 5962- 8959821m7a mt5c1008dcj-25/883c 5962-8959837m7a mt5c1008dcj-25l/883c 5962- 8959820m7a mt5c1008dcj-35/883c 5962-8959836m7a mt5c1008dcj-35l/883c 5962- 8959819m7a mt5c1008dcj-45/883c 5962-8959835m7a mt5c1008dcj-45l/883c 5962- 8959818m7a mt5c1008dcj-55/883c 5962-8959834m7a mt5c1008dcj-55l/883c 5962- 8959817m7a mt5c1008dcj-70/883c 5962-8959833m7a mt5c1008dcj-70l/883c 5962- 8959816m7a mt5c1008soj-20/883c 5962-8959838mya mt5c1008soj-20l/883c 5962-8959821mya mt5c1008soj-25/883c 5962-8959837mya mt5c1008soj-25l/883c 5962-8959820mya mt5c1008soj-35/883c 5962-8959836mya mt5c1008soj-35l/883c 5962-8959819mya mt5c1008soj-45/883c 5962-8959835mya mt5c1008soj-45l/883c 5962-8959818mya mt5c1008soj-55/883c 5962-8959834mya mt5c1008soj-55l/883c 5962-8959817mya mt5c1008soj-70/883c 5962-8959833mya mt5c1008soj-70l/883c 5962-8959816mya asi package designator f asi part # smd part # mt5c1008f-20/883c 5962-8959838mta mt5c1008f-20l/883c 5962-8959821mta mt5c1008f-25/883c 5962-8959837mta mt5c1008f-25l/883c 5962-8959820mta mt5c1008f-35/883c 5962-8959836mta mt5c1008f-35l/883c 5962-8959819mta mt5c1008f-45/883c 5962-8959835mta mt5c1008f-45l/883c 5962-8959818mta mt5c1008f-55/883c 5962-8959834mta mt5c1008f-55l/883c 5962-8959817mta MT5C1008F-70/883c 5962-8959833mta MT5C1008F-70l/883c 5962-8959816mta * asi part number is for reference only. orders received referencing the smd part number will be processed per the smd.
sram sram sram sram sram mt5c1008 austin semiconductor, inc. mt5c1008 rev. 6.5 7/02 austin semiconductor, inc. reserves the right to change products or specifications without notice. 17 date: 2/6/01 t echnical note: 128kx8 sram C maximum recommended supply voltage and ambient temperature compliance: this product fully meets and is tested in compliance with smd# 5962-89598 and tested in accordance with jesd78. specific product affected: die manufacturer: alliance semiconductor corporation die name: as2008sa device types: mt5c1008 , mt5c1009 speed grades: all package designators: all identifying date code marking: change implemented on product starting with date code 0100. characteristic identified: austin semiconductor, inc. has received notification from this die vendor, alliance semiconductor corp., that operation at high vcc?s of 6 volts and beyond may result in a latch-up condition. this can cause permanent damage to the device. recommendation: during use in system applications and during manufacturing processes, including burn-in and test, the devices should not be subjected to vcc supply voltages higher than 5.5volts at 125c.

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